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3D Imaging Analysis System
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Electronic Measuring Instruments
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High-Volume, Low Cost Production Test
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System-on-a-Chip semiconductors (SoC devices) are experiencing boundless evolution for digital electrical appliances and mobile communications units. To make full use of SoC device capabilities, high-level quality tests are being performed. The T6673 test system fully supports SoC device tests and accomplishes a huge reduction in total test cost.
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Abundance of Options Provides for Full Testing of Specifications
By developing new options for mixed signal tests, full testing of specifications can be performed for most new SoC devices, which are used for digital electrical appliances and nextgeneration cellular phones.
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High Throughput Achieved with New Multiple-CPU System
The T6673 has contributed in making the test time shorter by adopting multiple CPU architecture and developing new multiple thread software. Also, by adopting a high-speed bus only for data transfer, making concurrent measurements possible, the T6673 is capable of high throughput for testing analog devices. Additionally, by the simultaneous testing of up to 8 devices at high speed, the T6673 has achieved previously unobtainable high throughput.
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High Compatibility of T6000 Series
Since the T6000 series of test systems adopt a Viewpoint software platform, the individual test systems are highly compatible. Additionally, a test plan program has been developed, making it possible to minimize expenditure of time to perform test system maintenance. Also, the components, such as performance PCBs, are interchangeable, thereby allowing effective resource interoperability among these test systems.
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| Major Specifications |
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| Target Devices: |
High-speed SoC, High-speed MPU, ASIC |
| Test Speed: |
125 MHz/250 MHz/500 MHz (data rate) |
| Number of pins: |
1 station; up to 1024 I/O pins
2 stations; up to 512 I/O pins |
| Simultaneous Testing: |
Up to 8 |
| Timing generation: |
6 timing edges/pin
32 timing sets/pin on the fly |
| Pattern generator (SQPG): |
16 MW (standard), 64 MW (option) |
| Multiple DC test units: |
1 unit/16 pins |
| Universal DC test units: |
1 unit/128 pins |
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| Options |
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| SCPG: |
Operating frequency; 125 MHz
Memory capacity;
4 GW x 2 bits/pin or 16 GW x 2 bits/pin |
| ALPG: |
Operating frequency; 125 MHz
Address generation; 16X, 16Y
Data generation; 36D
AFM; 4 MW x 72 bits |
| AFG: |
Up to 4 output channels, 16 bits, 204.8 Ksps |
| AFD: |
Up to 4 input channels, 16 bits, 204.8 Ksps |
| VFG: |
Up to 2 output channels, 14 bits, 51.2 Msps |
| VFD: |
Up to 2 input channels, 12 bits, 41 Msps |
| SAMPLER: |
Up to 4 input channels, 1.5 GHz |
| SG: |
1 output channel, 1 MHz to 500 MHz |
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| Mixed-Signal Options |
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| WVFG: |
2 output channels x 4 ports, 16 bits, 200 Msps |
| WVFD: |
Up to 4 input channels,
14 bits at 250 Msps, or 16 bits at 60 Msps |
| GSAWG: |
1 output channel x 4 ports, 8 bits, 4 Gsps |
| TMU: |
Up to 4 input channels, resolution; 1 ps |
| SAMPLER2: |
Up to 4 input channels, 2 GHz |
| DCAP3: |
1 M x 32 bits |
| PSRR: |
Up to 25 KHz, up to 500 mVp-p |
| PAFG: |
2 output channels x 4 ports, 18/24 bits, 1 Msps |
| PAFD: |
8 input channels x 4 ports, 18/24 bits, 1 Msps |
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